| 摘要 |
Methods and a system are disclosed for correcting a non-planar region during fabrication of a semiconductor product on a wafer. The invention separates an exposure of at least a portion of a fill pattern on a resist from a product exposure so that the fill pattern can be adjusted to correct the non-planar region. In one embodiment, a determination of whether a fill pattern for a metal level above the non-planar region includes a portion over the non-planar region is made. Where a portion of the fill pattern is to be placed over the non-planar region, a pattern factor for exposure of the portion of the fill pattern on a resist is adjusted to correct the non-planar region.
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