发明名称 CORRELATED DOUBLE SAMPLING CIRCUIT AND SOLID-STATE IMAGING APPARATUS EMPLOYING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a technology of canceling an offset of an input signal applied to a correlated double sampling circuit. SOLUTION: The correlated double sampling circuit includes: an amplifier 16 with an input and an output; an input terminal receiving the input signal; an input capacitor 11 connected to the input terminal for first and second time phases; a feedback capacitor 18 connected to the output of the amplifier at the second time phase; a capacitor 15 connected between the amplifier input and a node for connection to the input capacitor and the feedback capacitor and for maintaining an offset cancel level for the second time phase; and a means for giving a first reference level to the capacitor maintaining the offset cancel level for the first time phase, and even when a circuit gain is varied, the correlated double sampling circuit cancels the offset of the input signal by applying the reference level to the capacitor maintaining the offset cancel level and varying the reference level with the circuit gain. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006303601(A) 申请公布日期 2006.11.02
申请号 JP20050118455 申请日期 2005.04.15
申请人 SONY CORP 发明人 TOMITA KEI;TAKEYABU MASAHITO
分类号 H04N5/335;H04N5/357;H04N5/363;H04N5/378 主分类号 H04N5/335
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