发明名称 Core logic circuit of computer system capable of accelerating 3D graphics
摘要 A core logic circuit which works with a CPU and a main graphics accelerator in a computer system is provided. The core logic chip includes a host controller electrically connected to the CPU for receiving a command from the CPU; an auxiliary graphing engine electrically connected to the host controller for receiving and processing the command; and a transmission controller electrically connected to the auxiliary graphing engine for transmitting the command that is processed and outputted by the auxiliary graphing engine to the main graphics accelerator to be further processed.
申请公布号 US7129952(B2) 申请公布日期 2006.10.31
申请号 US20020176398 申请日期 2002.06.21
申请人 SILICON INTEGRATED CORP. 发明人 LEE RUEN-RONE;HSIAO CHIEN-CHUNG;MEI LIN-TIEN;PAI HUNG-TA
分类号 G06F13/14;G06F3/14;G06F15/16 主分类号 G06F13/14
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