INTEGRATED CIRCUIT FOR THE PROCESSING AND SUBSEQUENT ROUTING OF MOTION PICTURE EXPERT GROUP (MPEG) DATA BETWEEN INTERFACES

摘要

Circuit integrated into a receiver system for digital television networks that processes and routes the data from one or various MPEG (Motion Picture Expert Group) data streams between two or more interfaces or peripherals, by using and embedded processor (PROC) and an internal common bus (BUS). The integrated circuit that constitutes this invention will integrate at least the following peripherals:
- 2 MPEG data stream input interfaces (ITSINA and ITSINB)
- 2 MPEG data stream output interfaces (ITSOUTA and ITSOUTB)
- Hard disk interface (IHD)
- Local network interface (ILAN)
- 2 smart card interfaces (ISMCA and ISMCB)
- Generic master interface to external slave peripherals and external memory (IMB)
- Generic slave interface from another external master device (ISB)