发明名称 LEVEL CONVERSION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a level conversion circuit that can surely be activated even if a voltage at a high logic level of input signals is low. SOLUTION: An input circuit (first transistor pair) for receiving complementary input signals is connected to a latch circuit (second transistor pair) that converts a first amplitude of the input signals into a second amplitude greater than the first amplitude. A current mirror circuit (third transistor pair) is located between the latch circuit and a high level power line. By the operation of the current mirror circuit, a source voltage of the second transistor that is turned on is lower than a source voltage of the second transistor that is turned off. The second transistor that is turned off is prone to be turned on even if an on-current of the corresponding first transistor is small. Conversely, the second transistor that is turned off is prone to be turned on. Thus, even if the voltage at the high logic level side of the input signals is low, the level conversion circuit is surely operated without a malfunction. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006279203(A) 申请公布日期 2006.10.12
申请号 JP20050091407 申请日期 2005.03.28
申请人 FUJITSU LTD 发明人 NUNOKAWA HIDEO
分类号 H03K19/0185 主分类号 H03K19/0185
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