发明名称 Wrapped core linking module for accessing system on chip test
摘要 A wrapped core linking module for accessing system on chip test includes a link control register that stores link control configuration between cores in a scan path of a system on chip according to control signals applied from an outside boundary. A link control register controller controls a shift and update link configuration by activating the link control register. A switch switches the scan path between wrapped cores based on the link control configuration of the link control register. An output logic connects the link control register to a test data out (TDO) of the chip in case of testing on chip or cores of system on chip.
申请公布号 US7117413(B2) 申请公布日期 2006.10.03
申请号 US20020284123 申请日期 2002.10.31
申请人 KOREA ELECTRONICS TECHNOLOGY INSTITUTE 发明人 PARK CHANG WON;PARK SUNG JU;LEE HYUNG SU;SONG JAE HOON
分类号 G01R31/28;G01R31/3185 主分类号 G01R31/28
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