| 摘要 |
An apparatus for supporting verification includes a detecting unit that detects description data of a false path from setting data for a system mode operation of a target circuit to be verified; an analyzing unit that analyzes the description data in the system mode operation and a test mode operation of the target circuit; a diversion determining unit that determines, based on a result of analysis by the analyzing unit, whether the description data is divertible to the test mode operation; and a generating unit that generates setting data for the test mode operation based on a result of determination by the determining unit.
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