发明名称 Double gate FET and fabrication process
摘要 A method of fabricating a double gate FET on a silicon substrate includes the steps of sequentially epitaxially growing a lower gate layer of crystalline rare earth silicide material on the substrate, a lower gate insulating layer of crystalline rare earth insulating material, an active layer of crystalline semiconductor material, an upper gate insulating layer of crystalline rare earth insulating material, and an upper gate layer of crystalline rare earth conductive material. The upper gate layer and the upper gate electrically insulating layer are etched and a contact is deposited on the upper gate layer to define an upper gate structure. An impurity is implanted into the lower gate layer to define a lower gate area aligned with the upper gate structure. A source and drain are formed in the active layer and contacts are deposited on the source and drain, respectively.
申请公布号 US2006208313(A1) 申请公布日期 2006.09.21
申请号 US20050084486 申请日期 2005.03.18
申请人 ATANACKOVIC PETAR B 发明人 ATANACKOVIC PETAR B.
分类号 H01L29/772;H01L21/336 主分类号 H01L29/772
代理机构 代理人
主权项
地址