发明名称 METHOD FOR THE PRODUCTION OF A CHIP ARRANGEMENT AND VARNISH FOR CARRYING OUT SAID METHOD
摘要 <p>The invention relates to a method for the production of a chip arrangement (1) comprising at least two semi-conductor chips (2) having, respectively, at least one electric contact point (3). The semi-conductor chips (2) and a contacting layer (6) are arranged in such a manner that the semi-conductor chips (2) face towards the contact points thereof (3) and the contact points (3) are connected to each other via the contacting layer (6). The contacting layer (6) is made of magnetically conductive particles (4), a first insulating material (5a) and a second insulating material (5b). The particles (4) are covered by the second insulating material (5b) and then, arranged together with the covering in the second insulating material (5b). The insulating materials (5a, 5b) are melted in an area between the contact points (3) by means of heat treatment after the contact point(s) have been coated and the position of at least one particle (4) is altered with the aid of a magnetic field in such a manner that the contact points (3) are electrically connected to each other by the at least one particle (3). The insulating materials (5a, 5b) are then solidified by cooling.</p>
申请公布号 EP1627425(B1) 申请公布日期 2006.08.30
申请号 EP20040731597 申请日期 2004.05.07
申请人 MICRONAS HOLDING GMBH 发明人 KLAPPROTH, HOLGER
分类号 H01L21/58;C09D5/23;H01L21/60;H01L21/98;H01L25/065 主分类号 H01L21/58
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