发明名称 2-Transistor floating-body dram
摘要 A dynamic random access memory includes a cell having a circuit between a floating-body transistor and a bit line. Activation of the circuit is controlled to provide isolation between the floating body and bit-line voltage both during write operations and during times when the cell is unselected. The added isolation improves performance, for example, by reducing the need for gate-to-body coupling and the magnitude of voltage swings between the bit lines.
申请公布号 US2006187706(A1) 申请公布日期 2006.08.24
申请号 US20040008666 申请日期 2004.12.10
申请人 INTEL CORPORATION 发明人 TANG STEPHEN H.;KESHAVARZI ALI;SOMASEKHAR DINESH;PAILLET FABRICE;KHELLAH MUHAMMAD M.;YE YIBIN;LU SHIH-LIEN L.;DE VIVEK K.
分类号 G11C11/34 主分类号 G11C11/34
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