发明名称 SYNCHRONOUS CIRCUIT GENERATOR BY TIMING SIGNAL
摘要 PROBLEM TO BE SOLVED: To provide a synchronous circuit generator by timing signal, which has speed-up effect of processing and facilitates synchronous circuit design. SOLUTION: This synchronous circuit generator comprises a timing signal control means newly generating, in a digital circuit composed of combination circuits constituted in multistage through synchronous registers controlled to a synchronous signal of fixed cycle such as a clock signal, a unique timing signal for every combination circuit derived from a propagation delay of combination circuit between the synchronous registers, and controlling the synchronous registers instead of the synchronous signal of fixed cycle; and a timing signal generation means generating a timing signal for notifying arrival of a maximum delay signal of combination circuit between the synchronous registers. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006221324(A) 申请公布日期 2006.08.24
申请号 JP20050032865 申请日期 2005.02.09
申请人 CANON INC 发明人 SAWADA HIDEKI
分类号 G06F13/42 主分类号 G06F13/42
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