发明名称 Method and apparatus for next-line prefetching from a predicted memory address
摘要 A method and apparatus for issuing one or more next-line prefetch requests from a predicted memory address. The first issued next-line prefetch request corresponds to a cache line having a memory address contiguous with the predicted memory address. Any subsequent next-line prefetch request corresponds to a cache line having a memory address contiguous with a memory address associated with a preceding next-line prefetch request.
申请公布号 US7093077(B2) 申请公布日期 2006.08.15
申请号 US20020163977 申请日期 2002.06.05
申请人 INTEL CORPORATION 发明人 COOKSEY ROBERT N.;JOURDAN STEPHAN J.
分类号 G06F12/00;G06F12/02;G06F12/08 主分类号 G06F12/00
代理机构 代理人
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