METHOD AND APPARATUS FOR STIMULUS ARTIFACT SUPPRESSION

摘要

Amplification of an evoked potential signal uses a high pass filter implemented as an integrator in a feedback loop which drives the DC offset voltage to zero. The feed-forward amplifier circuit has almost zero volts at its output. Because the voltage impressed across the feed-forward amplifier section is close to zero, the gain can be set to zero during the time that an electrical stimulus pulse is present without introducing any additional artifacts and subsequent amplifier stages are not driven into saturation. When the electrical stimulus potential is no longer present or is significantly reduced in amplitude and before the time of receipt of the response signal, the feed-forward amplifier is brought back into the circuit to provide the high gain required to amplify the response signal, which can be measured without interference from saturation of any of the amplifier stages as they recover to baseline.