发明名称 Data processing system and method for efficient communication utilizing an Ig coherency state
摘要 A cache coherent data processing system includes at least first and second coherency domains each including at least one processing unit and a cache memory. The cache memory includes a cache controller, a data array including a data storage location for caching a memory block, and a cache directory. The cache directory includes a tag field for storing an address tag in association with the memory block and a coherency state field associated with the tag field and the data storage location. The coherency state field has a plurality of possible states including a state that indicates that the address tag is valid, that the storage location does not contain valid data, and that the memory block is possibly cached outside of the first coherency domain.
申请公布号 US2006179247(A1) 申请公布日期 2006.08.10
申请号 US20050055524 申请日期 2005.02.10
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 FIELDS JAMES S.JR.;GUTHRIE GUY L.;STARKE WILLIAM J.;STUECHELI JEFFREY A.
分类号 G06F13/28 主分类号 G06F13/28
代理机构 代理人
主权项
地址