发明名称 |
Scrambling the current signature of an integrated circuit |
摘要 |
<p>The circuit has a linear regulator (4``) between a ground terminal (22) of an internal load (29) and a terminal (32) connected to the ground of an external supply voltage source (Vps). The regulator is in parallel with capacitive clipping circuits (5`) having switched capacitances. The circuits (5`) are activated, in an operation phase (D) of the integrated circuit, at the same time as the regulator. The operation phase (D) corresponds to a phase in which a calculating processor which contains the internal load (29) is active. An independent claim is also included for a method for scrambling the current signature of a load including an integrated circuit.</p> |
申请公布号 |
EP1688870(A1) |
申请公布日期 |
2006.08.09 |
申请号 |
EP20060101393 |
申请日期 |
2006.02.07 |
申请人 |
ST MICROELECTRONICS S.A.;UNIVERSITE D'AIX-MARSEILLE I |
发明人 |
TELANDRO, VINCENT;MALHERBE, ALEXANDRE;KUSSENER, EDITH |
分类号 |
G06K19/073 |
主分类号 |
G06K19/073 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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