| 摘要 |
<P>PROBLEM TO BE SOLVED: To shorten a verification period by preliminarily preventing the execution of simulation based on hardware description where the total number of paths is huge at the time of performing the path coverage measurement of a logic circuit. <P>SOLUTION: In this coverage evaluation device 200, when hardware description information 211 is inputted by an input part 201, a description rule is checked by a deciding part 202. When the description rule is matched with a description rule (1) or (2), hardware description information 211 is logically optimized, that is, rewritten according to the matched description rule by an optimizing part 203. Then, the total number of paths of logically optimized new hardware description information 213 is calculated by a calculation part 204. Logical simulation is executed by using the hardware description information 213 by an execution part 205. Then, path coverage 215 is measured by a measuring part 206. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
