| 摘要 |
A differential flip-flop ( 400 ) has an output stage ( 402 ) with first and second input terminals (X 1 , X 2 ), first and second output terminals (Q, Qb), a first voltage supply terminal (Vss), a first transistor ( 435 ) having a first current-handling terminal connected to the first output terminal (Q), a second current-handling terminal connected to the second output terminal (Qb), and a first control terminal connected to a clock signal (C). A second transistor has a third current-handling terminal connected to the first output terminal (Q), a fourth current-handling terminal connected to the voltage supply terminal (Vss), and a second control terminal connected to a first input terminal (X 1 ) of the output stage. A third transistor ( 440 ) has a fifth current-handling terminal connected to the first output terminal (Q), a sixth current-handling terminal connected to the voltage supply terminal (Vss), and a third control terminal connected to the second output terminal (Qb).
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