发明名称 MEMORY CELL AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a memory cell capable of further speeding up a writing operation. SOLUTION: The memory cell 1 includes first and second inverters 11 and 21 where input and output ends QT and QB are connected in a cross shape to constitute a flip-flop, and it is provided with a memory cell part 5 connected to a word line WLj, and a switch part 6 for cutting off a current path between a power source VDD and the output ends QT and QB of the first and second inverters 11 and 21. Thus, by cutting off the current path between the power source VDD and the output ends QT and QB of the first and second inverters 11 and 21, a writing operation is further accelerated. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006196124(A) 申请公布日期 2006.07.27
申请号 JP20050008382 申请日期 2005.01.14
申请人 NEC ELECTRONICS CORP 发明人 YOKOYAMA YOSHISATO
分类号 G11C11/412;G11C11/41 主分类号 G11C11/412
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