发明名称 Under bump metallurgy in integrated circuits
摘要 An integrated circuit package and method of manufacture is provided. A substrate having a number of contact pads exposed through a passivation layer thereon has a first under bump metallurgy layer over at least one of the contact pads. A top under bump metallurgy layer of copper having a thickness of less than about 800 angstroms is formed over the first under bump metallurgy layer.
申请公布号 US2006160267(A1) 申请公布日期 2006.07.20
申请号 US20050035637 申请日期 2005.01.14
申请人 STATS CHIPPAC LTD. 发明人 HUR HYEONG R.;YUEN YEW K.;LIM SEE C.;CHUA PUAY G.;GAN KAH W.;SONG JAE-YONG;JIN YONGGANG;AUNG KYAW O.
分类号 H01L21/50;H01L21/44;H01L21/48 主分类号 H01L21/50
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