发明名称 Method and system of modifying data in functional latches of a logic unit during scan chain testing thereof
摘要 A method of modifying data of functional latches of a logic unit during scan chain testing thereof to verify a test case failure of a suspected cell comprises: (a) determining a test case failure in the logic unit through scan chain testing thereof; (b) suspending clocked operations of the logic unit; (c) during suspended clocked operations of the logic unit, performing the following steps: (i) reading logic states of the functional latches; and (ii) modifying the logic state of at least one of the functional latches based on the determined test case failure; (d) restarting clocked operations of the logic unit; and (e) reading logic states of the functional latches resulting from the modification to verify the test case failure of a suspected cell.
申请公布号 US2006161826(A1) 申请公布日期 2006.07.20
申请号 US20050038733 申请日期 2005.01.20
申请人 GHISIAWAN NAVIN A;LAAKE KEVIN M;HOWLETT JOHN R 发明人 GHISIAWAN NAVIN A.;LAAKE KEVIN M.;HOWLETT JOHN R.
分类号 G01R31/28 主分类号 G01R31/28
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