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发明名称
SIGNALVERARBEITUNGSVERFAHREN ZUM TESTEN EINER VORRICHTUNG ZUR ENERGIEÜBERTRAGUNG
摘要
申请公布号
DE69931782(D1)
申请公布日期
2006.07.20
申请号
DE19996031782
申请日期
1999.06.29
申请人
VERI-TEK, INC.
发明人
JURANITCH, C.;LEWIS, J.;THEISZ, C.
分类号
G01M13/02;G01H3/10;G01H17/00
主分类号
G01M13/02
代理机构
代理人
主权项
地址
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