| 摘要 |
PROBLEM TO BE SOLVED: To provide a clock generating device capable of outputting a normal clock to other circuit blocks without a break in a system in which high reliability is requested. SOLUTION: The clock generating circuit comprises a signal generation portion which generates a signal of fixed level, a clock generation portion which generates a clock signal, and a signal selection portion which selects one of the signal of the fixed level inputted from the signal generation portion or the clock signal inputted from the clock generation portion, a storage portion which stores the selection timing of a choice between the clock signal and the signal of the fixed level by the signal selection portion, and a control portion which instructs the signal selection portion to select the clock signal or the signal of the fixed level according to the selection timing. COPYRIGHT: (C)2006,JPO&NCIPI
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