发明名称 |
System and method to analyze low yield of wafers caused by abnormal lot events |
摘要 |
The present invention provides an Intelligent Engineering Data Analysis (I-EDA) system and method to help prevent low wafer yield and prevent occurrences of abnormal events. The I-EDA has a non-conforming wafer tracing (NCWT) system that operates to correlate occurrences of abnormal events with low wafer yield. The method generally has the steps of performing a fabrication operation on wafers disposed within a wafer lot; determining if an abnormal event occurred while performing the fabrication operation on the wafers disposed within the wafer lot; using a NCWT to determine a statistical correlation between an occurrence of an abnormal event and a wafer yield of the wafers being processed during the occurrence of the abnormal event if the abnormal event occurred during processing of the wafers disposed within the wafer lot; and using the determined statistical correlation to analyze the fabrication process and thereby improve wafer yield.
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申请公布号 |
US2006116784(A1) |
申请公布日期 |
2006.06.01 |
申请号 |
US20040999850 |
申请日期 |
2004.11.30 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
CHIU WEN JEN;SHIAU WEI-CHIN;HSIUNG CHEN HSIN;WU KUAN L.;LAN YU-JYE;CHI SHIAW-LIN;HSU CHIA HUI;YU MING TSANG |
分类号 |
G06F19/00 |
主分类号 |
G06F19/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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