发明名称 |
PROCESSOR AND SECURE PROCESSING SYSTEM |
摘要 |
<p>For a command code and data stored in a command cache (102) and a data cache (104) of a processor (10), the processor (10) manages a secure attribute indicating whether the command code and the data are confidential information in a command management unit (103) and a data attribute management unit (105) and secure processing identification information used when the command code and the data are confidential information, for indicating the secure process where they are used. When the operation mode is switched from the secure mode to the normal mode, only the confidential information is invalidated by a memory invalidation unit (108). This prevents analysis of confidential information by a processor in the normal mode.</p> |
申请公布号 |
WO2006057316(A1) |
申请公布日期 |
2006.06.01 |
申请号 |
WO2005JP21614 |
申请日期 |
2005.11.24 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.;HARADA, MASAAKI;SEKIBE, TSUTOMU |
发明人 |
HARADA, MASAAKI;SEKIBE, TSUTOMU |
分类号 |
G06F12/14;G06F12/08;G06F15/78;G06F21/02;G06F21/24 |
主分类号 |
G06F12/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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