| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide the soft error immune cell structure of a semiconductor chip. <P>SOLUTION: A memory device is formed in a deep N well region 107. The memory device comprises a memory cell. The memory cell comprises a first memory node and a second memory node. The memory cell comprises a first resistor and a second resistor which are electrically coupled to the first memory node and the second memory node, respectively. The memory cell comprises a first capacitor and a second capacitor which are electrically coupled to the first memory node and the second memory node, respectively. An ILD layer 219 is formed on the memory device. The ILD layer 219 comprises a dielectric material which does not contain at least boron. An IMD layer 221 is formed on the ILD layer 219. The dielectric constant of the IMD layer 221 is smaller than 3. A polyimide layer 240 is formed on the IMD layer 221. The thickness of the polyimide layer is smaller than 20 μm. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
