| 摘要 |
Embodiments of the present invention recite a level shifting circuit for high voltage protection. In embodiments of the present invention, the level shifting circuit comprises a first transistor, a second transistor, a third transistor, and a fourth transistor coupled in a cascode configuration. The circuit further comprises a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor coupled in a cascode configuration. The level shifting circuit further comprises an output coupled with the source of the first transistor, the gate of the seventh transistor, and with the drain of the second transistor. A first inverter is coupled with a second inverter in series and an input signal conveyed to the first inverter dynamically controls the bias level for said second and sixth transistors.
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