发明名称 |
Semiconductor memory device for reducing damage to interlevel dielectric layer and fabrication method thereof |
摘要 |
The semiconductor memory device includes an interlevel dielectric pattern and an adhesive pattern, wherein both the interlevel dielectric and adhesive patterns include a contact hole to expose a semiconductor substrate. The adhesive pattern sufficiently adheres a lower electrode of a capacitor to the interlevel dielectric pattern, and thus prevents damage to the interlevel dielectric pattern during the formation of the capacitor. A conductive plug is disposed within the contact hole and may project higher than the top surface of the adhesive pattern. A leakage current preventive pattern is formed on top of the adhesive pattern and prevents a capacitor dielectric layer from directly contacting the plug to prevent occurrences of leakage current. A lower electrode of a capacitor electrically connected to the plug is formed on the plug.
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申请公布号 |
US7049648(B2) |
申请公布日期 |
2006.05.23 |
申请号 |
US20020309547 |
申请日期 |
2002.12.03 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
WON SEOK-JUN;YOO CHA-YOUNG |
分类号 |
H01L27/108;H01L21/02;H01L21/768;H01L21/8242 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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地址 |
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