发明名称 |
Damascene structure at semiconductor substrate level |
摘要 |
A damascene structure and process at semiconductor substrate level. A pre-metal dielectric layer is provided on a semiconductor substrate with an opening exposing a contact region on the substrate. A buffer metal layer is provided on the exposed contact region, and a barrier layer is provided on the interior of the opening. A conductor is provided on the buffer metal layer, substantially filling the opening to electrically connect to the contact region.
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申请公布号 |
US7049702(B2) |
申请公布日期 |
2006.05.23 |
申请号 |
US20030640757 |
申请日期 |
2003.08.14 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
TSENG HORNG-HUEI |
分类号 |
H01L29/40;H01L21/768;H01L23/485 |
主分类号 |
H01L29/40 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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