发明名称 HIGH ORDER COMPOSITION METHOD AND SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a high order composition method and system having a loop avoidance function capable of automatically generating an RTL circuit by using the reduced number of arithmetic operation units. SOLUTION: In scheduling for assigning an arithmetic operation to a step, it is decided whether or not a loop is generated by assigning the arithmetic operation to the step and when the loop is generated, generation of the loop in the circuit is avoided by not assigning the arithmetic operation to the step. Alternatively, in assigning the arithmetic operation to the arithmetic operation units, arithmetic operations with data dependency are not assigned to each other simultaneously so as to discriminate easily whether or not the loop is generated. Then, by discriminating an assignment candidate to generate the loop and eliminating it from the assignment candidate, the loop is prevented from being generated in the circuit. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006127346(A) 申请公布日期 2006.05.18
申请号 JP20040317616 申请日期 2004.11.01
申请人 NEC CORP 发明人 TAKAHASHI WATARU
分类号 G06F17/50 主分类号 G06F17/50
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