ELEMENT DECODER AND ELEMENT DECODING METHOD, PROGRAM, RECORDING MEDIUM, AND TURBO DECODER

摘要

PROBLEM TO BE SOLVED: To suppress an increase in the circuit scale of an element decoder in a turbo decoder. SOLUTION: The element decoder includes: a state transition probability arithmetic section 12a for calculating a state transition probabilityΓon the basis of an information bit sequence Sk, a redundant bit sequence Pk, and a prior likelihood Lk; a forward repetitive arithmetic section 12c for carrying out a forward repetitive arithmetic operation on the basis of the state transition probabilityΓ; a forward repetitive arithmetic operation result subtract section 12h for subtracting the maximum value of arithmetic results of the forward repetitive arithmetic means from the arithmetic results of the forward repetitive arithmetic section 12c; and a forward repetitive arithmetic operation result capacity limit section 12i so as to bring the minimum value of the subtraction results of the forward repetitive arithmetic operation result subtract section 12h to a prescribed lower limit or over, and since the forward repetitive arithmetic operation result capacity limit section 12i places a limit on a size of data recorded in a forward repetitive arithmetic result recording section 12d, the bit width of a memory configuring the forward repetitive arithmetic result recording section 12d can be decreased. Thus, the increase in the circuit scale of the element decoder 12 can be suppressed. COPYRIGHT: (C)2006,JPO&NCIPI