Thick metal layer integrated process flow to improve power delivery and mechanical buffering

摘要

A process flow to make an interconnect structure with one or more thick metal layers under Controlled Collapse Chip Connection (C 4 ) bumps at a die or wafer level. The interconnect structure may be used in a backend interconnect of a microprocessor. The one or more integrated thick metal layers may improve power delivery and reduce mechanical stress to a die at a die/package interface.