发明名称 BUS SYSTEM AND SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a technology for easily coping with the change of the address range of an access subject or each bus master. SOLUTION: This bus system is provided with a table (170) shared by a plurality of bus masters in which preliminarily set access right information is stored in association with an access subject and address information and an address monitoring part (160) for deciding the presence/absence of an access right of each bus master by referring to the table based on the access subject information of each bus master and address information outputted from the bus master. The table is shared by the plurality of bus masters, and when the address range of the access subject or each bus master is changed, the rewriting of the table may be operated. Thus, even when the plurality of bus masters are connected to a common bus, it is possible to easily cope with the change of the address range of the access subject or each bus master. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006091972(A) 申请公布日期 2006.04.06
申请号 JP20040273226 申请日期 2004.09.21
申请人 RENESAS TECHNOLOGY CORP 发明人 TAWARA YASUHIRO;NISHIMOTO JUNICHI
分类号 G06F13/362;G06F21/24;H04L12/40 主分类号 G06F13/362
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