发明名称 Stepped gate configuration for non-volatile memory
摘要 A memory device having a field effect transistor with a stepped gate dielectric and a method of making the same are herein disclosed. The stepped gate dielectric is formed on a semiconductor substrate and consists of a pair of charge trapping dielectrics separated by a gate dielectric; a gate conductor is formed thereover. Source and drain areas are formed in the semiconductor substrate on opposing sides of the pair of charge trapping dielectrics. The memory device is made by forming a charge trapping dielectric layer on a semiconductor substrate. A trench is formed through the charge trapping dielectric layer to expose a portion of the semiconductor substrate. A gate dielectric layer is formed within the trench and a gate conductor layer is formed over the charge trapping and gate dielectric layers.
申请公布号 US2006043466(A1) 申请公布日期 2006.03.02
申请号 US20050257636 申请日期 2005.10.25
申请人 MICRON TECHNOLOGY, INC. 发明人 MANNING H. M.;PAREKH KUNAL
分类号 H01L29/788 主分类号 H01L29/788
代理机构 代理人
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