| 摘要 |
PROBLEM TO BE SOLVED: To provide a data holding circuit which keeps a final output signal in a normal value by correcting software error even if the software error is caused, is simple in configuration, and enables a high speed operation. SOLUTION: The data holding circuit is provided with: a data holding part 11; a pull-up route including a 1st gate circuit constituted of a transistor (TR) PTr1 having 1st polarity and capable of inputting and holding input data D and 1st TR PTr2 having the 1st polarity and capable of pulling up a node DHLD of the data holding part 11 when a pull-up control signal held on a node PHLD is directly impressed to a gate and a pull-up control signal is one value; and a pull-down route which includes a 2nd gate circuit constituted of a TR NTr1 having 2nd polarity and entering and holding the input data D, and a 2nd TR NTr2 having the 2nd polarity and pulling down the node DHLD of the data holding part 11 when a pull-down control signal held on a node NHLD is directly impressed to a gate and when a pull-down control signal is the other value, and which is formed independently of the pull-up circuit 12. COPYRIGHT: (C)2006,JPO&NCIPI
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