发明名称 Method for universally testing semiconductor devices with different pin arrangement
摘要 An apparatus for testing a semiconductor device is disclosed. According to the present invention, the apparatus includes a pair of input pins, a first conductive wire, a second conductive wire, a driver and a terminator. A device-under-test (DUT) is connected to one of the pair of input pins. The first conductive wire and the second conductive wire are connected in parallel between the pair of input pins. The driver is coupled to the first conductive wire via a third conductive wire, and the terminator is coupled to the second conductive wire via a fourth conductive wire.
申请公布号 US7034564(B2) 申请公布日期 2006.04.25
申请号 US20050193384 申请日期 2005.08.01
申请人 NANYA TECHNOLOGY CORP. 发明人 YEH CHIH-HUI
分类号 G01R31/26;G01R31/28;G01R31/02;G01R31/319;G11C29/00;G11C29/56 主分类号 G01R31/26
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