发明名称 SIMULATING MULTIPORTED MEMORIES USING LOWER PORT COUNT MEMORIES
摘要 An apparatus and method for simulating a multiported memory using lower port count memories as banks. A portion of memory is allocated for storing data associated with a thread. The portion of memory allocated to a thread may be stored in a single bank or in multiple banks. A collector unit coupled to each bank gathers source operands needed to process a program instruction as the source operands output from one or more banks. The collector unit outputs the source operands to an execution unit when all of the source operands needed to process the program instruction have been gathered.
申请公布号 WO2006017135(A2) 申请公布日期 2006.02.16
申请号 WO2005US24164 申请日期 2005.07.07
申请人 NVIDIA CORPORATION;LINDHOLM, JOHN, ERIK;SIU, MING, Y.;MOY, SIMON, S.;LIU, SAMUEL;NICKOLLS, JOHN, R. 发明人 LINDHOLM, JOHN, ERIK;SIU, MING, Y.;MOY, SIMON, S.;LIU, SAMUEL;NICKOLLS, JOHN, R.
分类号 (IPC1-7):G06F9/30 主分类号 (IPC1-7):G06F9/30
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