发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND POWER SUPPLY VOLTAGE APPLICATION METHOD TO SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce an electrode area of a capacitive element in an IC incorporating a sample-hold circuit. SOLUTION: The sample-hold circuit 20 includes: a switch element 21 for sampling an input signal Vin; the capacitive element 22 for holding the sampled input signal with a charging voltage of Vc=Vin-Vce; and a buffer amplifier 23 for applying impedance conversion to the input signal Vin=Vc+Vce held in the capacitive element 22 and providing an output. The one terminal of the capacitive element 22 is connected to a connecting point between the switch element 21 and the buffer amplifier 23, and the other terminal is connected to an intermediate potential Vce. The withstanding voltage of the capacitive element 22 is lower than a difference between a high potential Vdd and a low potential Vss and is equal to a difference between the high potential Vdd and the intermediate potential Vce or over. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006050193(A) 申请公布日期 2006.02.16
申请号 JP20040227622 申请日期 2004.08.04
申请人 NEC ELECTRONICS CORP 发明人 TAKAHASHI MASAHARU;MINAMI TADAO
分类号 H03K19/00;H03K17/00 主分类号 H03K19/00
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