发明名称 METHOD OF EVALUATING SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
摘要 <P>PROBLEM TO BE SOLVED: To provide a technology which makes it possible to evaluate the leak characteristics distribution in a pn junction in the middle of manufacturing process of a semiconductor device having the pn junction, and to rapidly feed back the evaluation results to decision making of manufacturing process conditions. <P>SOLUTION: For a wafer in the middle of manufacturing process, an electron beam is irradiated several times on the surface of the wafer whereon a plug is exposed at prescribed intervals under such a condition that the pn junction may be reverse-biased. Monitoring the charged potential of the surface of the plug, the electron beam irradiation conditions are changed to such ones that the charged potential may come within a desired range. Under such irradiation conditions, a secondary electron signal of a circuit pattern is obtained and the leak characteristics are evaluated. Since the charged potential in the pn junction is relaxed according to the size of the leakage current within intermittent time, the leak characteristics are evaluated from the brightness signal of a potential contrast image. Thus, by measuring the charged potential and making it within a desired range, the evaluation results reflect a state in actual operation and thereby the accuracy improves. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006040991(A) 申请公布日期 2006.02.09
申请号 JP20040215183 申请日期 2004.07.23
申请人 HITACHI LTD;ELPIDA MEMORY INC 发明人 TAKATO ATSUKO;NOZOE MARI;OYU SHIZUNORI
分类号 H01L21/66;H01L21/8238;H01L21/8242;H01L27/092;H01L27/108 主分类号 H01L21/66
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