发明名称 Method of joining a chip on a substrate
摘要 A method and apparatus for making chip assemblies is disclosed that prevent or reduce the cracking and delamination of ultra low-k dielectrics in the back-end-of-line in Si chips that can occur during the chip assembly process. The method and apparatus apply pressure to the top and bottom surfaces of a substrate during the chip bonding process so that the bending and warping of the assembled modules are reduced. The reduced bending and warping prevent or reduce the cracking and delamination of ultra low-k dielectrics.
申请公布号 US9393633(B2) 申请公布日期 2016.07.19
申请号 US200912551960 申请日期 2009.09.01
申请人 GLOBALFOUNDRIES INC. 发明人 Blais Pascal P;Fortier Paul F;Lee Kang-Wook;Nah Jae-Woong;Park Soojae;Toutant Robert L;Warren Alain A
分类号 B23K20/00;B23K1/00;H01L21/56;H01L23/00 主分类号 B23K20/00
代理机构 Scully Scott Murphy and Presser 代理人 Scully Scott Murphy and Presser
主权项 1. A method of joining a chip on a substrate, comprising: positioning a substrate having a top surface and a bottom surface on a top surface of a carrier; positioning a cover on the substrate and the carrier so that the cover contacts at least a portion of the top surface of the substrate and at least a portion of a top surface of the carrier; securing the cover to the carrier, wherein the carrier and the cover cooperate to apply pressure to the top surface and the bottom surface of the substrate, said pressure being sufficient to at least reduce distortion but without restricting lateral expansion of the substrate; placing a chip onto the substrate after positioning said cover on said substrate; bonding the chip to the substrate; wherein the substrate expands in a lateral direction during bonding but the substrate does not bend or warp during bonding, and wherein the cover is dimensioned such that inside surfaces of the cover parallel to the side edges of the substrate are spaced a distance from the side edges of the substrate to permit lateral expansion of the substrate.
地址 Grand Cayman KY
您可能感兴趣的专利