发明名称 Method of timing model abstraction for circuits containing simultaneously switching internal signals
摘要 The present invention provides for determining arrival times in a circuit. An arrival time for a main signal is assigned. An arrival time for a secondary signal is assigned. It is determined whether a test is for an early arrival or for a later arrival. If the test type is for a late arrival, it is determined whether the arrival time for the secondary signal is later than for the first signal. If the test type is for an early arrival, it is determined whether the arrival time for the secondary signal is earlier than for the first signal. If the test type is for the late arrival and the arrival time for the secondary signal is later than for the first signal, assuming maximum interference between the signals. If the test type is for the late arrival and the arrival time for the secondary signal is not later than for the first signal, calculating the actual interference between the signals.
申请公布号 US2006031797(A1) 申请公布日期 2006.02.09
申请号 US20040897349 申请日期 2004.07.22
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 SOREFF JEFFREY P.;WARNOCK JAMES D.
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址