发明名称 Process for automatic dynamic reloading of data flow processors (DFPs) and units with two- or three-dimensional programmable cell architectures (FPGAs, DPGAs, and the like
摘要 In a data-processing method, first result data may be obtained using a plurality of configurable coarse-granular elements, the first result data may be written into a memory that includes spatially separate first and second memory areas and that is connected via a bus to the plurality of configurable coarse-granular elements, the first result data may be subsequently read out from the memory, and the first result data may be subsequently processed using the plurality of configurable coarse-granular elements. In a first configuration, the first memory area may be configured as a write memory, and the second memory area may be configured as a read memory. Subsequent to writing to and reading from the memory in accordance with the first configuration, the first memory area may be configured as a read memory, and the second memory area may be configured as a write memory.
申请公布号 US2006031595(A1) 申请公布日期 2006.02.09
申请号 US20050246617 申请日期 2005.10.07
申请人 VORBACH MARTIN;MUNCH ROBERT 发明人 VORBACH MARTIN;MUNCH ROBERT
分类号 G06F3/00;G06F15/82;G06F15/78;G06F17/50;H03K19/177 主分类号 G06F3/00
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