Semiconductor device with core and periphery regions

摘要

A method for forming a semiconductor device that includes a line and space pattern with variable pitch and critical dimensions in a layer on a substrate. The substrate includes a first region (e.g., a core region) and a second region (e.g., a periphery region). A first sub-line and space pattern in the first region comprises a space of a dimension (A) less than achievable by lithographic processes alone. Further, a second sub-line and space pattern in the second region comprises at least one line including a second critical dimension (B) achievable by lithography. The method uses two critical masking steps to form a hard mask that includes in the core region a critical dimension (A) less than achievable at a resolution limit of lithography. Further, the method uses a single etch step to transfer the pattern of the hard mask to the layer.