发明名称 |
Wiring structure to minimize stress induced void formation |
摘要 |
A wiring structure with improved resistance to void formation and a method of making the same are described. The wiring structure has a first conducting layer that includes a large area portion which is connected to an end of a protrusion with a plurality of "n" overlapping segments and at least one bending portion. The other end of the protrusion is connected to the bottom of a via which has an overlying second conducting layer. A bend is formed by overlapping the ends of two adjacent segments at an angle between 45° and 135°. The protrusion may also include at least one extension at a segment end beyond a bend. A bending portion and extension are used as bottlenecks to delay the diffusion of a vacancy from the large area portion to the vicinity of the via and is especially effective for copper interconnects or in a via test structure.
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申请公布号 |
US2006019414(A1) |
申请公布日期 |
2006.01.26 |
申请号 |
US20040899252 |
申请日期 |
2004.07.26 |
申请人 |
WANG CHIEN-JUNG;FAN SU-CHEN;HU DING-DA;CHEN HSUEH-CHUNG |
发明人 |
WANG CHIEN-JUNG;FAN SU-CHEN;HU DING-DA;CHEN HSUEH-CHUNG |
分类号 |
H01L21/66;G01R31/26;H01L23/52;H01L27/148 |
主分类号 |
H01L21/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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