发明名称 Method for making reduced size DMOS transistor and resulting DMOS transistor
摘要 A method is provided for making a laterally extended drain DMOS transistor. According to the method, a gate having two substantially parallel lateral faces is produced on a substrate, and a drain spacer and a source spacer made of an insulating material are produced on the lateral faces of the gate. The drain spacer and the source spacer are located on the drain side and the source side of the transistor, respectively. The width of the drain spacer is greater than a width of the source spacer. A DMOS transistor having such a gate and spacers is also provided. The width of the drain spacer is preferably substantially greater than the width of the source spacer, and is more preferably greater than the value of the absolute uncertainty relative to a dimension of a resin layer that is needed to perform a photolithography operation on the substrate.
申请公布号 US2006017103(A1) 申请公布日期 2006.01.26
申请号 US20050146306 申请日期 2005.06.06
申请人 STMICROELECTRONICS SA 发明人 SZELAG BERTRAND
分类号 H01L29/78;H01L21/336;H01L29/45 主分类号 H01L29/78
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