CLOCK GENERATION CIRCUIT, AND COMMUNICATION DEVICE

摘要

A clock generation circuit enabled to adjust the quantity of diffusion of a desired spectrum easily and reduced in unnecessary radiation. A clock generation circuit (100) comprises a PLL circuit (60) and a jitter addition circuit (20). The jitter addition circuit (20) generates a bias current for driving a voltage-controlled oscillator (16) of the PLL circuit (60), and adds fluctuations. This jitter addition circuit (20) includes an oscillator (22) and a current source (24) so that the fluctuation components generated by the oscillator (22) are added to the bias current. The oscillation frequency of the oscillator (22) is several times as high as the natural number of the frequency of an input clock signal (CKIN).