JITTER APPLICATION CIRCUIT, AND TEST DEVICE

摘要

A jitter application circuit for producing a clock signal containing a phase jitter component according to given jitter data. The jitter application circuit comprises a PLL circuit for producing an oscillating signal in response to a given reference signal, a variable delay circuit for outputting a clock signal delayed from the oscillating signal, a low-frequency application unit for controlling the oscillation frequency of the PLL circuit on the basis of the low-frequency component of the jitter data and for applying the low-frequency component of the phase jitter component to the oscillating signal, and a high-frequency application unit for controlling the delay in the variable delay circuit on the basis of the high-frequency component of the jitter data and for applying the high-frequency component of the phase jitter component to the clock signal.