METHOD FOR ERROR HANDLING IN A CONVERTER CIRCUIT FOR WIRING OF THREE VOLTAGE LEVELS

摘要

A method for error handling in a converter circuit for wiring of three voltage levels is disclosed, whereby the converter circuit comprises a partial converter system (1), for each phase (R, S, T), in which an upper error current path (A), or a lower error current path (B) is detected in the partial converter system (1). The upper error current path (A) runs over the first, second, third and sixth power semiconductor switch (S1, S2, S3, S6) of the partial converter system (1), or over the first and fifth power semiconductor switch (S1, S5) of the partial converter system (1) and the lower error current path (B) runs over the second, third, fourth and fifth power semiconductor switch (S2, S3, S4, S5) of the partial converter system (1) or over the fourth and sixth power semiconductor switch (S4, S6) of the partial converter system (1) and, after a error switching sequence the power semiconductor switches (S1, S2, S3, S4, S5, S6) are switched. According to the invention, a phase-side short-circuit of all phases of the converter circuit may be avoided and hence a secure operational state for the converter circuit in the case of an error may be achieved, whereby after the error switch sequence in the case of detection of the upper or the lower error current path (A, B), the switch status of each power semiconductor switch (S1, S2, S3, S4, S5, S6) on said detection is fixed. Furthermore, on detection of the upper error current path (A), the first power semiconductor switch (S1) and then the third power semiconductor (S3) are switched off and, on detection of the lower error current path (B), the fourth power semiconductor switch (S4) and then the second power semiconductor (S2) are switched off.