发明名称 System and method for generating a jittered test signal
摘要 A multi-speed jittered signal generator ( 216, 400 ) that generates a full-speed jittered signal ( 404 ) by scaling a low-speed jittered signal ( 420 ) using a frequency scaler ( 428 ). The low-speed jittered signal is created by injecting a modulation signal ( 416 ) into a reference signal ( 412 ) using a jitter injector ( 432 ). Injecting jitter into a low-speed reference signal allows the full-speed jittered signal to be of higher quality than conventional jitter signals created by injecting jitter information into a full-speed reference signal. The multi-speed jittered signal generator may be used as part of a testing system ( 208 ) for testing various circuitry, such as high-speed serializer/deserializer circuitry ( 220 ).
申请公布号 US2005271131(A1) 申请公布日期 2005.12.08
申请号 US20050114572 申请日期 2005.04.26
申请人 HAFED MOHAMED M;DUERDEN GEOFFREY D;ROBERTS GORDON W 发明人 HAFED MOHAMED M.;DUERDEN GEOFFREY D.;ROBERTS GORDON W.
分类号 G01R31/317;G01R31/3183;G01R31/319;H04B3/46;(IPC1-7):H04B3/46 主分类号 G01R31/317
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