| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory device and signal processing system in which data can be continuously read out at high speed. SOLUTION: There are included a data holding section which includes a first data latch circuit 225 for holding data read from a cell array and a second data latch circuit 226 to which held data of the first data latch circuit 225 are transferred in a predetermined timing and which holds the transferred data, the first data latch circuit and the second data latch circuit being provided in accordance with a plurality of banks 201, 202, and which is capable of transferring the read data to the outside if the data are held in the second data latch circuit; and a control circuit 211 which reads data from the cell array and causes the first data latch circuit 225 to hold the data if the data read from the cell array are held by the second data latch circuit 226 so as to be transferred to the outside. COPYRIGHT: (C)2006,JPO&NCIPI |
