| 摘要 |
A MULTILAYER CERAMIC CAPACITOR HAS A PLURALITY OF DIELECTRIC LAYERS (12) AND INNER LAYERS (10) LAMINATED ALTERNATELY ON ONE ANOTHER. IN EACH OF THE DIELECTRIC LAYERS, THE RATE OF CERAMIC GRAIN WHICH FORM THE DIELECTRIC LAYERS AND PRESENT SINGLY IN ONE DIELECTRIC LAYER (12) OVER ITS ENTIRE LONGITUDINAL THICKNESS IS SET TO AMOUNT TO 20% OR MORE. THE MULTILAYER CERAMIC CAPACITOR CAN PREVENT A DECREASE IN A CR PRODUCT TO A VALUE LOWER THAN A DESIRED LEVEL EVEN IF THE DIELECTRIC LAYER (12) BECOMES AS THIN AS 5 µM OF LESS. THIS CAN COMPLY WITH DEMANDS FOR A MULTILAYER CERAMIC CAPACITOR THAT THE NUMBER OF THE DIELECTRIC LAYERS TO BE LAMINATED ON THE INNER ELECTRODES (10) SHOULD BE INCREASED YET THE THICKNESS OF THE DIELECTRIC LAYERS (12) SHOULD BE MADE THINNER IN ORDER TO MEET REQUIREMENTS FOR MAKING ELECTRONIC CIRCUIT MORE COMPACT IN SIZE AND HIGHER IN DENSITY.
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